Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Description
- Figure 1. Logic diagram (STM6717/18)
- Figure 2. Logic diagram (STM6777/78)
- Figure 3. Logic diagram (STM6719/20)
- Figure 4. Logic diagram (STM6779/80)
- Table 2. Signal names
- Figure 5. STM6717/18 SOT23-5 connections
- Figure 6. STM6777/78 SOT23-6 connections
- Figure 7. STM6719/20 SOT23-6 connections
- Figure 8. STM6779/80 SOT23-6 connections
- 1.1 Pin descriptions
- 1.1.1 Active-low, push-pull reset output (RST) - STM6718/20/78/80
- 1.1.2 Active-low, open drain reset output (RST) - STM6717/19/77/79
- 1.1.3 Push-button reset input (MR)
- 1.1.4 Manual reset delay input (MRC) - STM6777/78/79/80)
- 1.1.5 Primary supply voltage monitoring input (VCC1)
- 1.1.6 Secondary supply voltage monitoring input (VCC2)
- 1.1.7 Adjustable reset comparator input (RSTIN; STM6719/20/79/80)
- 2 Operation
- 3 Typical operating characteristics
- Figure 13. Supply current vs. temperature (VCC1 = 5.5 V; VCC2 = 3.6 V)
- Figure 14. Supply current vs. temperature (VCC1 = 3.6 V; VCC2 = 2.75 V)
- Figure 15. Supply current vs. temperature (VCC1 = 3.0 V; VCC2 = 2.0 V)
- Figure 16. Supply current vs. temperature (VCC1 = 2.0 V; VCC2 = 1.0 V)
- Figure 17. Normalized VCC reset time-out period vs. temperature
- Figure 18. Maximum VCC transient duration vs. reset threshold overdrive
- Figure 19. Normalized VRST1 threshold vs. temperature
- Figure 20. Normalized VRST2 threshold vs. temperature
- Figure 21. Reset input threshold vs. temperature
- Figure 22. VCC1-to-reset delay vs. temperature
- Figure 23. Reset input-to-reset output delay vs. temperature
- Figure 24. MR-to-reset output delay vs. temperature (VCC1 = 3.6V)
- 4 Maximum rating
- 5 DC and AC parameters
- 6 Package mechanical data
- Figure 28. SOT23-5 - 5-lead small outline transistor package mechanical drawing
- Table 8. SOT23-5 - 5-lead small outline transistor package mechanical data
- Figure 29. SOT23-6 - 6-lead small outline transistor package mechanical drawing
- Table 9. SOT23-6 - 6-lead small outline transistor package mechanical data
- Figure 30. Carrier tape for SOT23-5L and SOT23-6L
- Table 10. Carrier tape dimensions for SOT23-5L and SOT23-6L
- 7 Part numbering
- 8 Revision history
STM6717/6718/6719/6720/STM6777/6778/6779/6780 Description
Doc ID 11469 Rev 8 7/30
1.1 Pin descriptions
1.1.1 Active-low, push-pull reset output (RST) - STM6718/20/78/80
The RST pin is driven low and stays low whenever V
CC1
or V
CC2
or RSTIN falls below its
factory-trimmed or adjustable reset threshold or when MR
goes to logic low. It remains low
for t
rec
after ALL supply voltages being monitored rise above their reset thresholds and MR
goes from low to high. (Push-pull outputs are referenced to V
CC1
.)
1.1.2 Active-low, open drain reset output (RST) - STM6717/19/77/79
The RST pin is driven low and stays low whenever V
CC1
or V
CC2
or RSTIN falls below its
factory-trimmed or adjustable reset threshold or when MR
goes to logic low. It remains low
for t
rec
after ALL supply voltages being monitored rise above their reset thresholds and MR
goes from low to high. Connect an external pull-up resistor to V
CC1
. A 10 kΩ pull-up resistor
should be sufficient for most applications.
1.1.3 Push-button reset input (MR)
When MR goes low the RST output is driven low. RST remains low as long as MR is low and
for t
rec
after MR returns to high. This active-low input has an internal 50 kΩ pull-up resistor to
Figure 5. STM6717/18 SOT23-5 connections Figure 6. STM6777/78 SOT23-6 connections
Figure 7. STM6719/20 SOT23-6 connections Figure 8. STM6779/80 SOT23-6 connections
1
RST
V
CC1
V
CC2
MR
V
SS
AI10417
2
3
4
5
1
RST
V
CC1
V
CC2
MR
V
SS
AI10418
2
3
4
5
6
MRC
1
RST
V
CC1
V
CC2
MR
V
SS
AI10419
2
3
4
6
5
RSTIN
1
RST
V
CC1
MRC
MR
V
SS
AI10420
2
3
4
6
5
RSTIN