Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Description
- Figure 1. Logic diagram (STM6717/18)
- Figure 2. Logic diagram (STM6777/78)
- Figure 3. Logic diagram (STM6719/20)
- Figure 4. Logic diagram (STM6779/80)
- Table 2. Signal names
- Figure 5. STM6717/18 SOT23-5 connections
- Figure 6. STM6777/78 SOT23-6 connections
- Figure 7. STM6719/20 SOT23-6 connections
- Figure 8. STM6779/80 SOT23-6 connections
- 1.1 Pin descriptions
- 1.1.1 Active-low, push-pull reset output (RST) - STM6718/20/78/80
- 1.1.2 Active-low, open drain reset output (RST) - STM6717/19/77/79
- 1.1.3 Push-button reset input (MR)
- 1.1.4 Manual reset delay input (MRC) - STM6777/78/79/80)
- 1.1.5 Primary supply voltage monitoring input (VCC1)
- 1.1.6 Secondary supply voltage monitoring input (VCC2)
- 1.1.7 Adjustable reset comparator input (RSTIN; STM6719/20/79/80)
- 2 Operation
- 3 Typical operating characteristics
- Figure 13. Supply current vs. temperature (VCC1 = 5.5 V; VCC2 = 3.6 V)
- Figure 14. Supply current vs. temperature (VCC1 = 3.6 V; VCC2 = 2.75 V)
- Figure 15. Supply current vs. temperature (VCC1 = 3.0 V; VCC2 = 2.0 V)
- Figure 16. Supply current vs. temperature (VCC1 = 2.0 V; VCC2 = 1.0 V)
- Figure 17. Normalized VCC reset time-out period vs. temperature
- Figure 18. Maximum VCC transient duration vs. reset threshold overdrive
- Figure 19. Normalized VRST1 threshold vs. temperature
- Figure 20. Normalized VRST2 threshold vs. temperature
- Figure 21. Reset input threshold vs. temperature
- Figure 22. VCC1-to-reset delay vs. temperature
- Figure 23. Reset input-to-reset output delay vs. temperature
- Figure 24. MR-to-reset output delay vs. temperature (VCC1 = 3.6V)
- 4 Maximum rating
- 5 DC and AC parameters
- 6 Package mechanical data
- Figure 28. SOT23-5 - 5-lead small outline transistor package mechanical drawing
- Table 8. SOT23-5 - 5-lead small outline transistor package mechanical data
- Figure 29. SOT23-6 - 6-lead small outline transistor package mechanical drawing
- Table 9. SOT23-6 - 6-lead small outline transistor package mechanical data
- Figure 30. Carrier tape for SOT23-5L and SOT23-6L
- Table 10. Carrier tape dimensions for SOT23-5L and SOT23-6L
- 7 Part numbering
- 8 Revision history
List of figures STM6717/6718/6719/6720/STM6777/6778/6779/6780
4/30 Doc ID 11469 Rev 8
List of figures
Figure 1. Logic diagram (STM6717/18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Logic diagram (STM6777/78) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Logic diagram (STM6719/20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Logic diagram (STM6779/80) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 5. STM6717/18 SOT23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 6. STM6777/78 SOT23-6 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 7. STM6719/20 SOT23-6 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 8. STM6779/80 SOT23-6 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 9. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 10. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 11. STM67xx interface to processor with bi-directional reset pins . . . . . . . . . . . . . . . . . . . . . . 10
Figure 12. Ensuring RST
valid to V
CC
= 0 (active-low, push-pull outputs). . . . . . . . . . . . . . . . . . . . . . 10
Figure 13. Supply current vs. temperature (V
CC1
= 5.5 V; V
CC2
= 3.6 V) . . . . . . . . . . . . . . . . . . . . . . 11
Figure 14. Supply current vs. temperature (V
CC1
= 3.6 V; V
CC2
= 2.75 V) . . . . . . . . . . . . . . . . . . . . . 11
Figure 15. Supply current vs. temperature (V
CC1
= 3.0 V; V
CC2
= 2.0 V) . . . . . . . . . . . . . . . . . . . . . . 12
Figure 16. Supply current vs. temperature (V
CC1
= 2.0 V; V
CC2
= 1.0 V) . . . . . . . . . . . . . . . . . . . . . . 12
Figure 17. Normalized V
CC
reset time-out period vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Maximum V
CC
transient duration vs. reset threshold overdrive . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Normalized V
RST1
threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 20. Normalized V
RST2
threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 21. Reset input threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. V
CC1
-to-reset delay vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Reset input-to-reset output delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. MR
-to-reset output delay vs. temperature (V
CC1
= 3.6V) . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 25. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. MR
timing waveform (STM6717/18/19/20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 27. MR
timing waveform (STM6777/78/79/80) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 28. SOT23-5 – 5-lead small outline transistor package mechanical drawing . . . . . . . . . . . . . . 23
Figure 29. SOT23-6 – 6-lead small outline transistor package mechanical drawing . . . . . . . . . . . . . . 24
Figure 30. Carrier tape for SOT23-5L and SOT23-6L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25