Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Description
- Figure 1. Logic diagram (STM6717/18)
- Figure 2. Logic diagram (STM6777/78)
- Figure 3. Logic diagram (STM6719/20)
- Figure 4. Logic diagram (STM6779/80)
- Table 2. Signal names
- Figure 5. STM6717/18 SOT23-5 connections
- Figure 6. STM6777/78 SOT23-6 connections
- Figure 7. STM6719/20 SOT23-6 connections
- Figure 8. STM6779/80 SOT23-6 connections
- 1.1 Pin descriptions
- 1.1.1 Active-low, push-pull reset output (RST) - STM6718/20/78/80
- 1.1.2 Active-low, open drain reset output (RST) - STM6717/19/77/79
- 1.1.3 Push-button reset input (MR)
- 1.1.4 Manual reset delay input (MRC) - STM6777/78/79/80)
- 1.1.5 Primary supply voltage monitoring input (VCC1)
- 1.1.6 Secondary supply voltage monitoring input (VCC2)
- 1.1.7 Adjustable reset comparator input (RSTIN; STM6719/20/79/80)
- 2 Operation
- 3 Typical operating characteristics
- Figure 13. Supply current vs. temperature (VCC1 = 5.5 V; VCC2 = 3.6 V)
- Figure 14. Supply current vs. temperature (VCC1 = 3.6 V; VCC2 = 2.75 V)
- Figure 15. Supply current vs. temperature (VCC1 = 3.0 V; VCC2 = 2.0 V)
- Figure 16. Supply current vs. temperature (VCC1 = 2.0 V; VCC2 = 1.0 V)
- Figure 17. Normalized VCC reset time-out period vs. temperature
- Figure 18. Maximum VCC transient duration vs. reset threshold overdrive
- Figure 19. Normalized VRST1 threshold vs. temperature
- Figure 20. Normalized VRST2 threshold vs. temperature
- Figure 21. Reset input threshold vs. temperature
- Figure 22. VCC1-to-reset delay vs. temperature
- Figure 23. Reset input-to-reset output delay vs. temperature
- Figure 24. MR-to-reset output delay vs. temperature (VCC1 = 3.6V)
- 4 Maximum rating
- 5 DC and AC parameters
- 6 Package mechanical data
- Figure 28. SOT23-5 - 5-lead small outline transistor package mechanical drawing
- Table 8. SOT23-5 - 5-lead small outline transistor package mechanical data
- Figure 29. SOT23-6 - 6-lead small outline transistor package mechanical drawing
- Table 9. SOT23-6 - 6-lead small outline transistor package mechanical data
- Figure 30. Carrier tape for SOT23-5L and SOT23-6L
- Table 10. Carrier tape dimensions for SOT23-5L and SOT23-6L
- 7 Part numbering
- 8 Revision history
STM6717/6718/6719/6720/STM6777/6778/6779/6780 DC and AC parameters
Doc ID 11469 Rev 8 21/30
Manual (push-button) reset input
V
IL
MR input voltage
0.3V
C
C1
V
V
IH
0.7V
CC1
V
t
MLMH
t
MR
MR minimum pulse width
(STM6717/18/19/20)
1µs
MR minimum pulse width
(STM6777/78/79/80)
MRC connected via
capacitor to V
SS
6µs
t
MLRL
t
MRD
MR to RST output delay 200 ns
MR
glitch immunity
(STM6717/18/19/20)
100 ns
MR
pull-up resistance 25 50 80 kΩ
1. Valid for ambient operating temperature: T
A
= –40 to 85 °C; V
CC1
= 0.8 to 5.5 V and V
CC2
= 0.8 to 3.6 V (except where
noted).
2. Input leakage for the MRC pin is not tested.
3. Guaranteed by design.
4. The leakage current measured on the RST
pin is tested with the reset de-asserted (output high impedance).
Table 6. DC and AC characteristics (continued)
Sym
Alter-
native
Description Test condition
(1)
Min Typ Max Unit
Table 7. t
MLMH
minimum pulse width
V
CC1
Capacitor value
(1)
100 pF 0.1 µF 2.2 µF 3.3 µF 4.7 µF 6.8 µF
1.6 V 120 µs 120 ms 2.6 s 4.0 s 5.6 s 8.2 s
2.0 V 122 µs 122 ms 2.7 s 4.0 s 5.8 s 8.3 s
3.0 V 125 µs 125 ms 2.7 s 4.1 s 5.9 s 8.5 s
4.0 V 128 µs 129 ms 2.8 s 4.2 s 6.0 s 8.7 s
5.0 V 130 µs 130 ms 2.8 s 4.3 s 6.1 s 8.8 s
1. At 25 °C (typical)