Datasheet

Operation STM6717/6718/6719/6720/STM6777/6778/6779/6780
10/30 Doc ID 11469 Rev 8
2 Operation
2.1 Applications information
1. Interfacing to processors with bi-directional reset pins
Most processors with bi-directional reset pins can interface directly to the open drain
RST
outputs (STM6717/19/77/79). Systems simultaneously requiring a push-pull RST
output and a bi-directional reset interface can be in logic contention. To prevent this
contention, connect a 4.7 kΩ resistor between RST
and the processor’s reset I/O as
shown in Figure 11.
2. Ensuring a valid RST
output down to V
CC
=0 V
The STM67xx supervisors are guaranteed to be in the correct RST
output logic state
when V
CC1
and/or V
CC2
is greater than 0.8 V. In applications which require valid reset
levels down to V
CC
= 0, a pull-down resistor to active-low outputs (push-pull only, see
Figure 12) will ensure that the reset line is valid while the reset output can no longer
sink or source current. This scheme does NOT work with the open drain outputs of the
STM6717/19/77/79.
The resistor value used is not critical, but it must be large enough not to load the reset
output when V
CC
is above the reset threshold. For most applications, 100 kΩ is
adequate.
Figure 11. STM67xx interface to processor with bi-directional reset pins
Figure 12. Ensuring RST
valid to V
CC
= 0 (active-low, push-pull outputs)
AI10425
V
CC1
V
CC2
V
SS
V
CC1
STM67xx
RST
To other
system
components
4.7kΩ
V
CC2
V
SS
Processor
RESET
AI10426
V
CC1
V
CC1
V
SS
STM67xx
RST
R1