Datasheet

Description STM6600, STM6601
8/52 Doc ID 15453 Rev 11
Figure 6. Block diagram
1. Internal pull-up resistor connected to PB input (see Table 5 for precise specifications).
2. Optional internal pull-up resistor connected to SR
input (see Table 5 for precise specifications and Table 10 for detailed
device options).
3. Internal pull-down resistor is connected to PS
HOLD
input only during startup (see Figure 7, 8, 9, 10, 11, 12, 13, and 18).
V
TH+
PB
EN (EN)
Smart
logic
Edge detector debounce
SRD logic
GND
C
SRD
t
REC
generator
INT
RST
PS
HOLD
V
CC
VCC
LO
V
REF
Glitch immunity
PB
OUT
AM00237v3
1.5 V
Edge detector debounce
Glitch immunity
+
–
V
TH–
+
–
SR
R
PSHOLD
(3)
V
CC
V
CC
R
PB
R
SR
(1)
(2)