Datasheet

Waveforms STM6600, STM6601
26/52 Doc ID 15453 Rev 11
Figure 20. Undervoltage detected for <t
SRD
1. V
CC
goes above V
TH+
within t
SRD
thus power is not disabled after t
SRD
expires.
2. t
SRD
period is set by external capacitor C
SRD
.
Figure 21. Undervoltage detected for >t
SRD
1. After t
SRD
expires V
CC
is still insufficient (below V
TH+
) thus power is disabled (EN goes low or EN goes high).
2. t
SRD
period is set by external capacitor C
SRD
.
PB status ignored
V
CC
under-
voltage
detection
ignored
V
CC-Min
VCC
LO
V
CC
(1)
EN
and EN is deasserted
accordingly
PB status
ignored
processor interrupt starts power-down sequence
processor sets PS
HOLD
low
t
SRD
(2)
set by C
SRD
t
DEBOUNCE
t
INT_Min
t
EN_OFF
INT
V
CC
undervoltage
detected
V
TH+
V
TH
–
PS
HOLD
AM00254v1
EN
VCC
LO
V
CC-Min
PB status
ignored
V
CC
is below V
TH+
even after t
SRD
expires
thus power is disabled (EN goes low) and
PB is monitored for regular startup
V
CC
under-
voltage
detection
ignored
INT
PS
HOLD
V
CC
undervoltage
detected
V
TH+
V
TH
–
V
CC
(1)
PB status ignored
t
DEBOUNCE
t
INT_Min
t
EN_OFF
t
SRD
(2)
set by C
SRD
AM00255v1