Datasheet

Waveforms STM6600, STM6601
24/52 Doc ID 15453 Rev 11
Figure 18. Long push (option with RST assertion)
1. t
SRD
period is set by external capacitor C
SRD
.
2. PB
ignored during t
INT_Min
.
3. PS
HOLD
signal is ignored during t
ON_BLANK
. Its level is checked after t
ON_BLANK
expires and if it is high the EN signal
remains asserted, otherwise EN goes low.
4. Internal pull-down resistor 300 kΩ is connected to PS
HOLD
input during startup when device is reset.
internal pull-down resistor
connected to PS
HOLD
input
PS
HOLD
ignored
PB status
ignored
t
ON_BLANK
t
SRD
(1)
set by C
SRD
V
CC
undervoltage detection status ignored
PB
PS
HOLD
(3, 4)
INT
(2)
RST
Push-button pressed
and PB connected to
GND
t
DEBOUNCE
t
REC
Push-button held even
after t
SRD
expires
therefore RST is asserted
INT can go high, if PB goes high,
but system freezes and processor
won’t respond
if system freezes, processor won’t
respond to any INT status change
t
INT
_
Min
t
DEBOUNCE
After t
ON_BLANK
PB is monitored
for falling edge
t
ON_
BLANK
expires
PS
HOLD
state detected as high
therefore EN remains high
(valid for STM6600 and STM6601)
SR
AM00252v2
Note: EN is high.