Datasheet

Description STM6502, STM6503, STM6504, STM6505
12/29 Doc ID 16101 Rev 6
1.2.7 Programmable Smart Reset input delay (TSR pin) – STM6503 and
STM6504 only
The TSR pin allows the user to program the setup time before the push-button action is
validated by the reset output. It is controlled by different voltage levels on the three-state
TSR input pin: when connected to ground, t
SRC
= 2 s; when left open, t
SRC
= 6 s; when
connected to V
CC
, t
SRC
= 10 s (all times are minimum). TSR is a DC-type input, intended to
be either permanently grounded, permanently connected to V
CC
or permanently left open.
If it is left open, for improved system glitch immunity it is strongly recommended to connect
a 0.1 µF decoupling ceramic capacitor between the TSR and V
SS
pins.
1.2.8 Reset output (RST)
RST is the active-low, open-drain reset output in the Smart Reset family.
1.2.9 Battery monitoring input (V
BAT
) – STM6505 only
V
BAT
is an input for monitoring the battery voltage. V
BAT
threshold is 1.25 V, fixed, and an
external resistor divider is to be used to set the actual battery voltage threshold.
1.2.10 Battery low detect output (BLD) – STM6505 only
The battery low detect output is controlled by the V
BAT
voltage monitoring input and is
active-low, open-drain, with no pull-up.
Figure 9. STM6505 timing
AM00329
RST
BLD
SR0
SR1
t
SRC
t
REC
V
BAT
V
BATTH