Datasheet

Operation STM6315
8/21
2.4 Valid RST output down to V
CC
= 0V
When V
CC
falls below 1V, the RST output no longer sinks current, but becomes an open
circuit. In most systems this is not a problem, as most MCUs do not operate below 1V.
However, in applications where RST
output must be valid down to 0V, a pull-down resistor
may be added to hold the RST
output low. This resistor must be large enough to not load
the RST
output, and still be small enough to pull the output to Ground. A 100KΩ resistor is
recommended.
Figure 5. Reset timing diagram
Figure 6. Manual reset timing diagram, switch bounce/debounce
AI11166
RST
V
CC
V
RST
V
CC
(min)
t
rec
AI11167b
RST
MR
trec
MR-to-RST Delay
MR Glitch Rejection
MR Input Pulse Width