Datasheet

DocID022799 Rev 6 103/132
STM32L15xCC STM32L15xRC STM32L15xUC STM32L15xVC Electrical characteristics
111
Figure 30. Maximum dynamic current consumption on V
REF+
supply pin during ADC
conversion
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 31 or Figure 32,
depending on whether V
REF+
is connected to V
DDA
or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed as close as possible to the chip.
ADC clock
Sampling (n cycles)
Conversion (12 cycles)
I
ref+
300µA
700µA
Table 58. R
AIN
max for f
ADC
= 16 MHz
(1)
Ts
(cycles)
Ts
(µs)
R
AIN
max (k)
Multiplexed channels Direct channels
2.4 V < V
DDA
< 3.6 V 1.8 V < V
DDA
< 2.4 V 2.4 V < V
DDA
< 3.6 V 1.8 V < V
DDA
< 2.4 V
4 0.25 Not allowed Not allowed 0.7 Not allowed
9 0.5625 0.8 Not allowed 2.0 1.0
16 1 2.0 0.8 4.0 3.0
24 1.5 3.0 1.8 6.0 4.5
48 3 6.8 4.0 15.0 10.0
96 6 15.0 10.0 30.0 20.0
192 12 32.0 25.0 50.0 40.0
384 24 50.0 50.0 50.0 50.0
1. Guaranteed by design, not tested in production.