Datasheet

Electrical characteristics STM32L151x6/8/B, STM32L152x6/8/B
82/131 DocID17659 Rev 9
6.3.13 I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 42 are derived from tests
performed under conditions summarized in Table 13. All I/Os are CMOS and TTL compliant.
Table 42. I/O static characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
IL
Input low level voltage - - - - 0.3V
DD
(1)
V
V
IH
Input high level voltage
Standard I/O
0.7 V
DD
--
FT I/O - -
V
hys
I/O Schmitt trigger voltage
hysteresis
(2)
Standard I/O - 10% V
DD
(3)
-
FT I/O - 5% V
DD
(4)
-
I
lkg
Input leakage current
(5)
V
SS
≤ V
IN
≤ V
DD
I/Os with LCD
--±50
nA
V
SS
≤ V
IN
≤ V
DD
I/Os with analog
switches
--±50
V
SS
≤ V
IN
≤ V
DD
I/Os with analog
switches and LCD
--±50
V
SS
≤ V
IN
≤ V
DD
I/Os with USB
--TBD
FT I/O
V
DD
≤ V
IN
≤ 5V
--TBD
V
SS
≤ V
IN
≤ V
DD
Standard I/Os
--±50
R
PU
Weak pull-up equivalent resistor
(6)(1)
V
IN
= V
SS
30 45 60 kΩ
R
PD
Weak pull-down equivalent resistor
(6)
V
IN
= V
DD
30 45 60 kΩ
C
IO
I/O pin capacitance - - - 5 - pF
1. Tested in production
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.
3. With a minimum of 200 mV. Based on characterization, not tested in production.
4. With a minimum of 100 mV. Based on characterization, not tested in production.
5. The max. value may be exceeded if negative current is injected on adjacent pins.
6. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
MOS/NMOS contribution to the series resistance is minimum (~10% order).