Datasheet

DocID17659 Rev 9 125/131
STM32L151x6/8/B, STM32L152x6/8/B Revision history
130
25-Feb-2011 4
Features: updated value of Low-power sleep.
Section 3.3.2: Power supply supervisor: updated note.
Table 8: STM32L15xxx pin definitions: modified main function (after
reset) and alternate function for OSC_IN and OSC_OUT pins;
modified footnote 5; added footnote to OSC32_IN and OSC32_OUT
pins; C1 and D1 removed on PD0 and PD1 pins (TFBGA64
column).
Section 3.11: DAC (digital-to-analog converter): updated bullet list.
Table 10: Voltage characteristics: updated footnote 3 regarding
I
INJ(PIN)
.
Table 11: Current characteristics: updated footnote 4 regarding
positive and negative injection.
Table 14: Embedded reset and power control block characteristics:
updated typ and max values for T
RSTTEMPO
(V
DD
rising, BOR
enabled).
Table 17: Current consumption in Run mode, code with data
processing running from Flash on page 57: removed values for HSI
clock source (16 MHz), Range 3.
Table 18: Current consumption in Run mode, code with data
processing running from RAM on page 58: removed values for HSI
clock source (16 MHz), Range 3.
Table 19: Current consumption in Sleep mode on page 59 removed
values for HSI clock source (16 MHz), Range 3 for both RAM and
Flash; changed units.
Table 20: Current consumption in Low power run mode on page 61:
updated parameter and max value of I
DD
Max (LP Run).
Table 21: Current consumption in Low power sleep mode on
page 62: updated symbol, parameter, and max value of I
DD
Max (LP
Sleep).
Table 22: Typical and maximum current consumptions in Stop mode
on page 63 updated values for I
DD (Stop with RTC)
- RTC clocked by
LSE external clock (32.768 kHz), regulator in LP mode, HSI and
HSE OFF (no independent watchdog).
Table 71. Document revision history (continued)
Date Revision Changes