Datasheet

Electrical characteristics STM32L100C6, STM32L100R8/RB
58/102 DocID024295 Rev 1
6.3.5 External clock source characteristics
High-speed external user clock generated from an external source
4. Data based on a differential IDD measurement between DAC in reset configuration and continuous DAC
conversion of VDD/2. DAC is in buffered mode, output is left floating.
5. Including supply current of internal reference voltage.
Table 24. High-speed external user clock characteristics
(1)
1. Guaranteed by design, not tested in production.
Symbol Parameter Conditions Min Typ Max Unit
f
HSE_ext
User external clock source
frequency
1832MHz
V
HSEH
OSC_IN input pin high level voltage 0.7V
DD
V
DD
V
V
HSEL
OSC_IN input pin low level voltage V
SS
0.3V
DD
t
w(HSE)
t
w(HSE)
OSC_IN high or low time 12
ns
t
r(HSE)
t
f(HSE)
OSC_IN rise or fall time 20
C
in(HSE)
OSC_IN input capacitance 2.6 pF
DuCy
(HSE)
Duty cycle 45 55 %
I
L
OSC_IN Input leakage current V
SS
≤V
IN
≤V
DD
±1 µA