Datasheet
STM32L100C6, STM32L100R8/RB Pin descriptions
DocID024295 Rev 1 33/102
46 34 PA13 I/O FT
JTMS/
SWDAT
47 35 V
SS_2
SV
SS_2
48 36 V
DD_2
SV
DD_2
49 37 PA14 I/O FT
JTCK
/SWCLK
50 38 PA15 I/O FT JTDI TIM2_CH1_ETR/PA15/SPI1_NSS/LCD_SEG17
51 - PC10 I/O FT PC10
USART3_TX/LCD_SEG28/LCD_SEG40/
LCD_COM4
52 - PC11 I/O FT PC11
USART3_RX/LCD_SEG29/LCD_SEG41/
LCD_COM5
53 - PC12 I/O FT PC12
USART3_CK/LCD_SEG30/LCD_SEG42/
LCD_COM6
54 - PD2 I/O FT PD2 TIM3_ETR/LCD_SEG43/LCD_COM7
55 39 PB3 I/O FT JTDO
TIM2_CH2/PB3/SPI1_SCK/COMP2_INM/
LCD_SEG7
56 40 PB4 I/O FT NJTRST TIM3_CH1/PB4/ SPI1_MISO/COMP2_INP/LCD_SEG8
57 41 PB5 I/O FT PB5
I2C1_SMBA/TIM3_CH2/SPI1_MOSI/COMP2_INP/
LCD_SEG9
58 42 PB6 I/O FT PB6 I2C1_SCL/TIM4_CH1/USART1_TX
59 43 PB7 I/O FT PB7
I2C1_SDA/TIM4_CH2/
USART1_RX/PVD_IN
60 44 BOOT0 I BOOT0
61 45 PB8 I/O FT PB8 TIM4_CH3/I2C1_SCL/LCD_SEG16/TIM10_CH1
62 46 PB9 I/O FT PB9 TIM4_CH4/I2C1_SDA/LCD_COM3/TIM11_CH1
63 47 V
SS_3
SV
SS_3
64 48 V
DD_3
SV
DD_3
1. I = input, O = output, S = supply.
2. FT = 5 V tolerant.
3. Function availability depends on the chosen device. For devices having reduced peripheral counts, it is always the lower
number of peripheral that is included. For example, if a device has only one SPI and two USARTs, they will be called SPI1
and USART1 & USART2, respectively. Refer to Table 1 on page 10.
Table 7. STM32L100xx pin definitions (continued)
Pins
Pin name
Type
(1)
I/O Level
(2)
Main
function
(3)
(after reset)
Alternate functions
LQFP64
UFQFPN48