Datasheet

STM32L100C6, STM32L100R8/RB Functional overview
DocID024295 Rev 1 25/102
Eight DAC trigger inputs are used in the STM32L100xx. The DAC channels are triggered
through the timer update outputs that are also connected to different DMA channels.
3.12 Ultralow power comparators and reference voltage
The STM32L100xx embeds two comparators sharing the same current bias and reference
voltage. The reference voltage can be internal or external (coming from an I/O).
• one comparator with fixed threshold
• one comparator with rail-to-rail inputs, fast or slow mode. The threshold can be one of
the following:
– DAC output
– External I/O
– Internal reference voltage (V
REFINT
) or V
REFINT
submultiple (1/4, 1/2, 3/4)
Both comparators can wake up from Stop mode, and be combined into a window
comparator.
The internal reference voltage is available externally via a low power / low current output
buffer (driving current capability of 1 µA typical).
3.13 Routing interface
This interface controls the internal routing of I/Os to TIM2, TIM3, TIM4 and to the
comparator and reference voltage output.
3.14 Timers and watchdogs
The ultralow power STM32L100xx devices include six general-purpose timers, two basic
timers and two watchdog timers.
Table 6 compares the features of the general-purpose and basic timers.
Table 6. Timer feature comparison
Timer
Counter
resolution
Counter
type
Prescaler
factor
DMA request
generation
Capture/compare
channels
Complementary
outputs
TIM2,
TIM3,
TIM4
16-bit
Up,
down,
up/down
Any integer
between 1
and 65536
Yes 4 No
TIM9 16-bit Up
Any integer
between 1
and 65536
No 2 No
TIM10,
TIM11
16-bit Up
Any integer
between 1
and 65536
No 1 No
TIM6,
TIM7
16-bit Up
Any integer
between 1
and 65536
Yes 0 No