Datasheet

STM32L100C6, STM32L100R8/RB Functional overview
DocID024295 Rev 1 21/102
Figure 2. Clock tree
1. For the USB function to be available, both HSE and PLL must be enabled, with the CPU running at either
24 MHz or 32 MHz.
!("
0RESCALER

!0"
0RESCALER

0#,+
(#,+
TO!("BUSCORE
MEMORYAND$-!
PERIPHERALS
TO!0"
0ERIPHERAL#LOCK
%NABLE
%NABLE
0ERIPHERAL#LOCK
!0"
0RESCALER

0#,+
TO4)-AND
PERIPHERALSTO!0"
0ERIPHERAL#LOCK
%NABLE
%NABLE
0ERIPHERAL#LOCK
-(ZMAX
-(ZMAX
TO#ORTEX3YSTEMTIMER

#LOCK
%NABLE
393#,+
4)-X#,+
4)-X#,+
&#,+#ORTEX
FREERUNNINGCLOCK
TO4)-AND
)F!0"PRESCALERX
ELSEX
)F!0"PRESCALERX
ELSEX
-(ZMAX
(3%/3#
-(Z
/3#?). 
/3#?/54
(3)2#
-(Z
XXXX
XXX

0,,-5,
0,,#,+
(3)
(3)
(3%
0,,32#
37
#33
XX

-(Z
53"#,+
TO53"INTERFACE
0,,$)6
TO!$#
0ERIPHERALCLOCK
ENABLE
!$##,+
-(Z
MAX

/3#?).
/3#?/54
,3%/3#
K(Z
,3)2#
K(Z
TO)NDEPENDENT7ATCHDOG)7$'
-#/
0,,#,+
(3)
(3%
,3%
,3)


TO24#
-#/3%,
24##,+
24#3%,;=
)7$'#,+
393#,+


-3)
,3%
,3)
TO,#$
TO
4IMER%42
(3%(IGHSPEEDEXTERNALCLOCKSIGNAL
,3%,OWSPEEDEXTERNALCLOCKSIGNAL
,3),OWSPEEDINTERNALCLOCKSIGNAL
(3) (IGHSPEEDINTERNALCLOCKSIGNAL
,EGEND
AIC
-3)-ULTISPEEDINTERNALCLOCKSIGNAL
0,,6#/
-3)2#
-3)