Datasheet

STM32L100C6, STM32L100R8/RB Functional overview
DocID024295 Rev 1 17/102
3.2 ARM
®
Cortex™-M3 core with MPU
The ARM Cortex™-M3 processor is the industry leading processor for embedded systems.
It has been developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced system response to interrupts.
The ARM Cortex™-M3 32-bit RISC processor features exceptional code-efficiency,
delivering the high-performance expected from an ARM core in the memory size usually
associated with 8- and 16-bit devices.
The memory protection unit (MPU) improves system reliability by defining the memory
attributes (such as read/write access permissions) for different memory regions. It provides
up to eight different regions and an optional predefined background region.
Owing to its embedded ARM core, the STM32L100xx is compatible with all ARM tools and
software.
DAC Y Y Y Y Y --
Comparators Y Y Y Y Y Y --
16-bit and 32-bit
Timers
Y Y Y Y -- --
IWDG Y Y Y Y Y Y Y Y
WWDG Y Y Y Y -- --
Systic Timer Y Y Y Y --
GPIOs Y Y Y Y Y Y 3 Pins
Wakeup time to
Run mode
0 µs 0.36 µs 3 µs 32 µs < 8 µs 50 µs
Consumption
V
DD
=1.8V to 3.6V
(Typ)
Do wn to
214 µA/MHz
(from Flash)
D o w n t o
50 µA/MHz
(from Flash)
Down to
9 µA
Down to
4.4 µA
0.65 µA (No
RTC) V
DD
=1.8V
0.3 µA (No RTC)
V
DD
=1.8V
1.4 µA (with
RTC) V
DD
=1.8V
1 µA (with RTC)
V
DD
=1.8V
0.65 µA (No
RTC) V
DD
=3.0V
0.3 µA (No RTC)
V
DD
=3.0V
1.6 µA (with
RTC) V
DD
=3.0V
1.3 µA (with
RTC) V
DD
=3.0V
1. The startup on communication line wakes the CPU which was made possible by an EXTI, this induces a delay before
entering run mode.
Table 4. Working mode-dependent functionalities (from Run/active down to standby) (continued)
Ips Run/Active Sleep
Low-
power
Run
Low-
power
Sleep
Stop Standby
Wakeup
capability
Wakeup
capability