Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
80/185 DocID022152 Rev 4
Figure 23. External capacitor C
EXT
1. Legend: ESR is the equivalent series resistance.
5.3.3 Operating conditions at power-up / power-down (regulator ON)
Subject to general operating conditions for T
A
.
5.3.4 Operating conditions at power-up / power-down (regulator OFF)
Subject to general operating conditions for T
A
.
5.3.5 Embedded reset and power control block characteristics
The parameters given in Table 19 are derived from tests performed under ambient
temperature and V
DD
supply voltage conditions summarized in Table 14.
Table 16. V
CAP_1
/V
CAP_2
operating conditions
(1)
1. When bypassing the voltage regulator, the two 2.2 µF V
CAP
capacitors are not required and should be
replaced by two 100 nF decoupling capacitors.
Symbol Parameter Conditions
CEXT Capacitance of external capacitor 2.2 µF
ESR ESR of external capacitor < 2 Ω
MS19044V2
ESR
R
Leak
C
Table 17. Operating conditions at power-up / power-down (regulator ON)
Symbol Parameter Min Max Unit
t
VDD
V
DD
rise time rate 20 ∞
µs/V
V
DD
fall time rate 20 ∞
Table 18. Operating conditions at power-up / power-down (regulator OFF)
(1)
1. To reset the internal logic at power-down, a reset must be applied on pin PA0 when V
DD
reach below
minimum value of V
12
.
Symbol Parameter Conditions Min Max Unit
t
VDD
V
DD
rise time rate Power-up 20 ∞
µs/V
V
DD
fall time rate Power-down 20 ∞
t
VCAP
V
CAP_1
and V
CAP_2
rise time
rate
Power-up 20 ∞
V
CAP_1
and V
CAP_2
fall time
rate
Power-down 20 ∞