Datasheet

DocID022152 Rev 4 75/185
STM32F405xx, STM32F407xx Electrical characteristics
5.1.6 Power supply scheme
Figure 21. Power supply scheme
1. Each power supply pair must be decoupled with filtering ceramic capacitors as shown above. These
capacitors must be placed as close as possible to, or below, the appropriate pins on the underside of the
PCB to ensure the good functionality of the device.
2. To connect BYPASS_REG and PDR_ON pins, refer to Section 2.2.16: Voltage regulator and Table 2.2.15:
Power supply supervisor.
3. The two 2.2 µF ceramic capacitors should be replaced by two 100 nF decoupling capacitors when the
voltage regulator is OFF.
4. The 4.7 µF ceramic capacitor must be connected to one of the V
DD
pin.
5. V
DDA
=V
DD
and V
SSA
=V
SS
.
MS19911V2
Backup circuitry
(OSC32K,RTC,
Wakeup logic
Backup registers,
backup RAM)
Kernel logic
(CPU, digital
& RAM)
Analog:
RCs,
PLL,..
Power
switch
VBAT
GPIOs
OUT
IN
15 × 100 nF
+ 1 × 4.7 μF
VBAT =
1.65 to 3.6V
Voltage
regulator
VDDA
ADC
Level shifter
IO
Logic
VDD
100 nF
+ 1 μF
Flash memory
VCAP_1
VCAP_2
2 × 2.2 μF
BYPASS_REG
PDR_ON
Reset
controller
VDD
1/2/...14/15
VSS
1/2/...14/15
VDD
VREF+
VREF-
VSSA
VREF
100 nF
+ 1 μF