Datasheet

DocID022152 Rev 4 139/185
STM32F405xx, STM32F407xx Electrical characteristics
Figure 56. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid - 1.5 ns
t
h(BL_NOE)
FSMC_BL hold time after FSMC_NOE high 0 - ns
t
su(Data_NE)
Data to FSMC_NEx high setup time T
HCLK
+4 - ns
t
su(Data_NOE)
Data to FSMC_NOEx high setup time T
HCLK
+4 - ns
t
h(Data_NOE)
Data hold time after FSMC_NOE high 0 - ns
t
h(Data_NE)
Data hold time after FSMC_NEx high 0 - ns
t
v(NADV_NE)
FSMC_NEx low to FSMC_NADV low - 2 ns
t
w(NADV)
FSMC_NADV low time - T
HCLK
ns
1. C
L
= 30 pF.
2. Based on characterization, not tested in production.
Table 76. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
(1)(2)
Symbol Parameter Min Max Unit
t
w(NE)
FSMC_NE low time 3T
HCLK
3T
HCLK
+ 4 ns
t
v(NWE_NE)
FSMC_NEx low to FSMC_NWE low T
HCLK
–0.5 T
HCLK
+0.5 ns
t
w(NWE)
FSMC_NWE low time T
HCLK
–1 T
HCLK
+2 ns
t
h(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time T
HCLK
–1 - ns
t
v(A_NE)
FSMC_NEx low to FSMC_A valid - 0 ns
Table 75. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings
(1)(2)
NBL
Data
FSMC_NEx
FSMC_NBL[1:0]
FSMC_D[15:0]
t
v(BL_NE)
t
h(Data_NWE)
FSMC_NOE
Address
FSMC_A[25:0]
t
v(A_NE)
t
w(NWE)
FSMC_NWE
t
v(NWE_NE)
t
h(NE_NWE)
t
h(A_NWE)
t
h(BL_NWE)
t
v(Data_NE)
t
w(NE)
ai14990
FSMC_NADV
(1)
t
v(NADV_NE)
t
w(NADV)