Datasheet

Electrical characteristics STM32F405xx, STM32F407xx
126/185 DocID022152 Rev 4
Figure 46. ULPI timing diagram
Ethernet characteristics
Unless otherwise specified, the parameters given in Table 64, Table 65 and Table 66 for
SMI, RMII and MII are derived from tests performed under the ambient temperature, f
HCLK
frequency summarized in Table 14 and VDD supply voltage conditions summarized in
Table 63, with the following configuration:
• Output speed is set to OSPEEDRy[1:0] = 10
• Capacitive load C = 30 pF
• Measurement points are done at CMOS levels: 0.5V
DD
.
Refer to Section 5.3.16: I/O port characteristics for more details on the input/output
characteristics.
1. Guaranteed by design, not tested in production.
Table 62. ULPI timing
Parameter Symbol
Value
(1)
1. V
DD
= 2.7 V to 3.6 V and T
A
= –40 to 85 °C.
Unit
Min. Max.
Control in (ULPI_DIR) setup time
t
SC
-2.0
ns
Control in (ULPI_NXT) setup time - 1.5
Control in (ULPI_DIR, ULPI_NXT) hold time t
HC
0-
Data in setup time t
SD
-2.0
Data in hold time t
HD
0-
Control out (ULPI_STP) setup time and hold time t
DC
-9.2
Data out available from clock rising edge t
DD
-10.7
Clock
Control In
(ULPI_DIR,
ULPI_NXT)
data In
(8-bit)
Control out
(ULPI_STP)
data out
(8-bit)
t
DD
t
DC
t
HD
t
SD
t
HC
t
SC
ai17361c
t
DC