Datasheet

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STM32F37xxx Electrical characteristics
114
6.3.3 Embedded reset and power control block characteristics
The parameters given in Table 24 are derived from tests performed under ambient
temperature and V
DD
supply voltage conditions summarized in Table 22.
Table 24. Embedded reset and power control block characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
POR/PDR
(1)
1. The PDR detector monitors V
DD
, V
DDA
and V
DDSD12
(if kept enabled in the option bytes). The POR
detector monitors only V
DD
.
Power on/power down
reset threshold
Falling edge 1.80
(2)
2. The product behavior is guaranteed by design down to the minimum V
POR/PDR
value.
1.88 1.96 V
Rising edge 1.84 1.92 2.00 V
V
PDRhyst
(3)
PDR hysteresis - 40 - mV
t
RSTTEMPO
(3)
3. Guaranteed by design, not tested in production.
POR reset temporization 1.50 2.50 4.50 ms
Table 25. Programmable voltage detector characteristics
Symbol Parameter Conditions Min
(1)
1. Data based on characterization results only, not tested in production.
Typ Max
(1)
Unit
V
PVD0
PVD threshold 0
Rising edge 2.10 2.18 2.26 V
Falling edge 2.00 2.08 2.16 V
V
PVD1
PVD threshold 1
Rising edge 2.19 2.28 2.37 V
Falling edge 2.09 2.18 2.27 V
V
PVD2
PVD threshold 2
Rising edge 2.28 2.38 2.48 V
Falling edge 2.18 2.28 2.38 V
V
PVD3
PVD threshold 3
Rising edge 2.38 2.48 2.58 V
Falling edge 2.28 2.38 2.48 V
V
PVD4
PVD threshold 4
Rising edge 2.47 2.58 2.69 V
Falling edge 2.37 2.48 2.59 V
V
PVD5
PVD threshold 5
Rising edge 2.57 2.68 2.79 V
Falling edge 2.47 2.58 2.69 V
V
PVD6
PVD threshold 6
Rising edge 2.66 2.78 2.9 V
Falling edge 2.56 2.68 2.8 V
V
PVD7
PVD threshold 7
Rising edge 2.76 2.88 3.00 V
Falling edge 2.66 2.78 2.90 V
V
PVDhyst
(2)
2. Guaranteed by design, not tested in production.
PVD hysteresis - 100 - mV
IDD(PVD)
(2)
PVD current
consumption
- 0.15 0.26 µA