Datasheet
Functional overview STM32F37xxx
18/131 DocID022691 Rev 4
3.13 16-bit sigma delta analog-to-digital converters (SDADC)
Up to three 16-bit sigma-delta analog-to-digital converters are embedded in the
STM32F373x. They have up to two separate supply voltages allowing the analog function
voltage range to be independent from the STM32F373x power supply. They share up to 21
input pins which may be configured in any combination of single-ended (up to 21) or
differential inputs (up to 11).
The conversion speed is up to 16.6 ksps for each SDADC when converting multiple
channels and up to 50 ksps per SDADC if single channel conversion is used. There are two
conversion modes: single conversion mode or continuous mode, capable of automatically
scanning any number of channels. The data can be automatically stored in a system RAM
buffer, reducing the software overhead.
A timer triggering system can be used in order to control the start of conversion of the three
SDADCs and/or the 12-bit fast ADC. This timing control is very flexible, capable of triggering
simultaneous conversions or inserting a programmable delay between the ADCs.
Up to two external reference pins (VREFSD+, VREFSD-) and an internal 1.2/1.8 V
reference can be used in conjunction with a programmable gain (x0.5 to x32) in order to
fine-tune the input voltage range of the SDADC.
3.14 Digital-to-analog converter (DAC)
The devices feature up to two 12-bit buffered DACs with three output channels that can be
used to convert three digital signals into three analog voltage signal outputs. The internal
structure is composed of integrated resistor strings and an amplifier in inverting
configuration.
This digital Interface supports the following features:
• Up to two DAC converters with three output channels:
– DAC1 with two output channels
– DAC2 with one output channel.
• 8-bit or 10-bit monotonic output
• Left or right data alignment in 12-bit mode
• Synchronized update capability
• Noise-wave generation
• triangular-wave generation
• Dual DAC channel independent or simultaneous conversions (DAC1 only)
• DMA capability for each channel
• External triggers for conversion