Datasheet

STM32F313xx Functional overview
Doc ID 023636 Rev 1 19/58
3.16.2 General-purpose timers (TIM2, TIM3, TIM4, TIM15, TIM16, TIM17)
There are up to six synchronizable general-purpose timers embedded in the STM32F313xx
(see Ta bl e 5 for differences). Each general-purpose timer can be used to generate PWM
outputs, or act as a simple time base.
● TIM2, 3, and TIM4
These are full-featured general-purpose timers:
– TIM2 has a 32-bit auto-reload up/downcounter and 32-bit prescaler
– TIM3 and 4 have 16-bit auto-reload up/downcounters and 16-bit prescalers.
These timers all feature 4 independent channels for input capture/output compare,
PWM or one-pulse mode output. They can work together, or with the other general-
purpose timers via the Timer Link feature for synchronization or event chaining.
The counters can be frozen in debug mode.
All have independent DMA request generation and support quadrature encoders.
● TIM15, 16 and 17
These three timers general-purpose timers with mid-range features:
They have 16-bit auto-reload upcounters and 16-bit prescalers.
– TIM15 has 2 channels and 1 complementary channel
– TIM16 and TIM17 have 1 channel and 1 complementary channel
All channels can be used for input capture/output compare, PWM or one-pulse mode
output.
The timers can work together via the Timer Link feature for synchronization or event
chaining. The timers have independent DMA request generation.
The counters can be frozen in debug mode.
3.16.3 Basic timers (TIM6, TIM7)
These timers are mainly used for DAC trigger generation. They can also be used as a
generic 16-bit time base.
3.16.4 Independent watchdog
The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is
clocked from an independent 40 kHz internal RC and as it operates independently from the
main clock, it can operate in Stop mode. It can be used either as a watchdog to reset the
device when a problem occurs, or as a free running timer for application timeout
management. It is hardware or software configurable through the option bytes. The counter
can be frozen in debug mode.
3.16.5 Window watchdog
The window watchdog is based on a 7-bit downcounter that can be set as free running. It
can be used as a watchdog to reset the device when a problem occurs. It is clocked from the
main clock. It has an early warning interrupt capability and the counter can be frozen in
debug mode.