Datasheet

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September 2012 Doc ID 023636 Rev 1 1/58
1
STM32F313xx
ARM Cortex-M4 32b MCU+FPU, up to 256KB Flash+48KB SRAM
4 ADCs, 2 DACs, 7 comp., 4 PGA, timers, 1.8 V operation
Data brief
Features
Core: ARM® 32-bit Cortex-M4F CPU (72 MHz
max), single-cycle multiplication and HW
division, DSP instruction with FPU (floating-point
unit) and MPU (memory protection unit).
Operating conditions:
V
DD
: 1.8V +/- 8%
–V
DDA
voltage range: 1.65 to 3.6 V
Memories
128 to 256 Kbytes of Flash memory
Up to 40 Kbytes of SRAM on data bus with
HW parity check
8 Kbytes of SRAM on instruction bus with
HW parity check (CCM)
CRC calculation unit
Reset and supply management
Low power modes: Sleep
and Stop
VBAT supply for RTC and backup registers
Clock management
4 to 32 MHz crystal oscillator
32 kHz oscillator for RTC with calibration
Internal 8 MHz RC with x 16 PLL option
Internal 40 kHz oscillator
Up to 87 fast I/Os
All mappable on external interrupt vectors
Several 5 V-tolerant
12-channel DMA controller
Up to four ADC 0.20 µS (up to 39 channels) with
selectable resolution of 12/10/8/6 bits, 0 to 3.6 V
conversion range, separate analog supply from
1.8 to 3.6 V
Up to two 12-bit DAC channels with analog
supply from 2.4 to 3.6 V
Seven fast rail-to-rail analog comparators with
analog supply from
1.65 to 3.6 V
Up to four operational amplifiers that can be
used in PGA mode, all terminal accessible with
analog supply from 2.4 to 3.6 V
Support for up to 23 capacitive sensing keys
supporting touchkey, linear and rotary
touchsensors
Up to 13 timers
One 32-bit timer and two 16-bit timers with
up to 4 IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
Up to two 16-bit 6-channel advanced-control
timers, with up to 6 PWM channels,
deadtime generation and emergency stop
One 16-bit timer with 2 IC/OCs, 1
OCN/PWM, deadtime generation and
emergency stop
Two 16-bit timers with IC/OC/OCN/PWM,
deadtime generation and emergency stop
Two watchdog timers (independent, window)
SysTick timer: 24-bit downcounter
Up to two 16-bit basic timers to drive the
DAC
Calendar RTC with Alarm, periodic wakeup from
Stop
Communication interfaces
CAN interface (2.0B Active)
–Two I
2
C Fast mode plus (1 Mbit/s) with 20
mA current sink, SMBus/PMBus, wakeup
from STOP
Up to five USART/UARTs (ISO 7816
interface, LIN, IrDA, modem control)
Up to three SPIs, two with multiplexed I
2
S
interface, 4 to 16 programmable bit frame
Infrared Transmitter
Serial wire debug, JTAG, Cortex-M4F ETM
96-bit unique ID
Table 1. Device summary
Reference Part number
STM32F313xx STM32F313CC, STM32F313RC, STM32F313VC
LQFP64 (10 × 10 mm)
LQFP100 (14 × 14 mm)
LQFP48 (7 × 7 mm)
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