Datasheet

Electrical characteristics STM32F303xB STM32F303xC
60/133 DocID023353 Rev 7
6.3.2 Operating conditions at power-up / power-down
The parameters given in Table 23 are derived from tests performed under the ambient
temperature condition summarized in Table 22.
6.3.3 Embedded reset and power control block characteristics
The parameters given in Table 24 are derived from tests performed under ambient
temperature and V
DD
supply voltage conditions summarized in Table 22.
Table 23. Operating conditions at power-up / power-down
Symbol Parameter Conditions Min Max Unit
t
VDD
V
DD
rise time rate 0

µs/V
V
DD
fall time rate 20

t
VDDA
V
DDA
rise time rate 0

V
DDA
fall time rate 20

Table 24. Embedded reset and power control block characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
POR/PDR
(1)
1. The PDR detector monitors V
DD
and also V
DDA
(if kept enabled in the option bytes). The POR detector
monitors only V
DD
.
Power on/power down
reset threshold
Falling edge
1.8
(2)
2. The product behavior is guaranteed by design down to the minimum V
POR/PDR
value.
1.88 1.96 V
Rising edge 1.84 1.92 2.0 V
V
PDRhyst
(1)
PDR hysteresis - 40 - mV
t
RSTTEMPO
(3)
3. Guaranteed by design, not tested in production.
POR reset
temporization
1.5 2.5 4.5 ms