Datasheet

Functional overview STM32F303xB STM32F303xC
24/133 DocID023353 Rev 7
The RTC is an independent BCD timer/counter. It supports the following features:
 Calendar with subsecond, seconds, minutes, hours (12 or 24 format), week day, date,
month, year, in BCD (binary-coded decimal) format.
 Reference clock detection: a more precise second source clock (50 or 60 Hz) can be
used to enhance the calendar precision.
 Automatic correction for 28, 29 (leap year), 30 and 31 days of the month.
 Two programmable alarms with wake up from Stop and Standby mode capability.
 On-the-fly correction from 1 to 32767 RTC clock pulses. This can be used to
synchronize it with a master clock.
 Digital calibration circuit with 1 ppm resolution, to compensate for quartz crystal
inaccuracy.
 Three anti-tamper detection pins with programmable filter. The MCU can be woken up
from Stopand Standby modes on tamper event detection.
 Timestamp feature which can be used to save the calendar content. This function can
be triggered by an event on the timestamp pin, or by a tamper event. The MCU can be
woken up from Stop and Standby modes on timestamp event detection.
 17-bit Auto-reload counter for periodic interrupt with wakeup from STOP/STANDBY
capability.
The RTC clock sources can be:
 A 32.768 kHz external crystal
 A resonator or oscillator
 The internal low-power RC oscillator (typical frequency of 40 kHz)
 The high-speed external clock divided by 32.
3.18 Inter-integrated circuit interface (I
2
C)
Up to two I
2
C bus interfaces can operate in multimaster and slave modes. They can support
standard (up to 100 KHz), fast (up to 400 KHz) and fast mode + (up to 1 MHz) modes.
Both support 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses
(2 addresses, 1 with configurable mask). They also include programmable analog and
digital noise filters.
In addition, they provide hardware support for SMBUS 2.0 and PMBUS 1.1: ARP capability,
Host notify protocol, hardware CRC (PEC) generation/verification, timeouts verifications and
Table 4. Comparison of I2C analog and digital filters
Analog filter Digital filter
Pulse width of
suppressed spikes
 50 ns
Programmable length from 1 to 15
I2C peripheral clocks
Benefits Available in Stop mode
1. Extra filtering capability vs.
standard requirements.
2. Stable length
Drawbacks
Variations depending on
temperature, voltage, process
Wakeup from Stop on address
match is not available when digital
filter is enabled.