Datasheet

DocID023353 Rev 7 23/133
STM32F303xB STM32F303xC Functional overview
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3.16.4 Independent watchdog (IWDG)
The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is
clocked from an independent 40 kHz internal RC and as it operates independently from the
main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog
to reset the device when a problem occurs, or as a free running timer for application timeout
management. It is hardware or software configurable through the option bytes. The counter
can be frozen in debug mode.
3.16.5 Window watchdog (WWDG)
The window watchdog is based on a 7-bit downcounter that can be set as free running. It
can be used as a watchdog to reset the device when a problem occurs. It is clocked from
the main clock. It has an early warning interrupt capability and the counter can be frozen in
debug mode.
3.16.6 SysTick timer
This timer is dedicated to real-time operating systems, but could also be used as a standard
down counter. It features:
 A 24-bit down counter
 Autoreload capability
 Maskable system interrupt generation when the counter reaches 0.
 Programmable clock source
3.17 Real-time clock (RTC) and backup registers
The RTC and the 16 backup registers are supplied through a switch that takes power from
either the V
DD
supply when present or the V
BAT
pin. The backup registers are sixteen 32-bit
registers used to store 64 bytes of user application data when V
DD
power is not present.
They are not reset by a system or power reset, or when the device wakes up from Standby
mode.