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STM32F303xB STM32F303xC Electrical characteristics
118
Figure 33. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
6.3.20 Comparator characteristics
R
LOAD
C
LOAD
Buffered/Non-buffered DAC
DACx_OUT
Buffer(1)
12-bit
digital to
analog
converter
ai17157
Table 71. Comparator characteristics
(1)
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
Analog supply voltage 2 - 3.6
VV
IN
Comparator input voltage
range
0-V
DDA
V
BG
Scaler input voltage - 1.2 -
V
SC
Scaler offset voltage - ±5 ±10 mV
t
S_SC
Scaler startup time from
power down
--0.1ms
t
START
Comparator startup time
Startup time to reach propagation delay
specification
- - 60 µs
t
D
Propagation delay for
200 mV step with 100 mV
overdrive
Ultra-low power mode - 2 4.5
µsLow power mode - 0.7 1.5
Medium power mode - 0.3 0.6
High speed mode
V
DDA
 2.7 V - 50 100
ns
V
DDA
 2.7 V - 100 240
Propagation delay for full
range step with 100 mV
overdrive
Ultra-low power mode - 2 7
µsLow power mode - 0.7 2.1
Medium power mode - 0.3 1.2
High speed mode
V
DDA
 2.7 V - 90 180
ns
V
DDA
 2.7 V - 110 300
V
offset
Comparator offset error - 4 10 mV
dV
offset
/dT
Offset error temperature
coefficient
-18-
µV/°
C