Datasheet

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STM32F303xB STM32F303xC Electrical characteristics
118
Figure 32. Typical connection diagram using the ADC
1. Refer to Table 66 for the values of R
AIN
.
2. C
parasitic
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high C
parasitic
value will downgrade conversion accuracy. To remedy
this, f
ADC
should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 10. The 10 nF capacitor
should be ceramic (good quality) and it should be placed as close as possible to the chip.
6.3.19 DAC electrical specifications
MS19881V2
V
DD
AINx
I
L
±1 μA
0.6 V
V
T
R
AIN
(1)
C
parasitic
V
AIN
0.6 V
V
T
R
ADC
12-bit
converter
C
ADC
Sample and hold ADC
converter
Table 70. DAC characteristics
Symbol Parameter Min Typ Max Unit Comments
V
DDA
Analog supply voltage for
DAC ON
2.4 - 3.6 V
R
LOAD
(1)
Resistive load with buffer ON 5 - - k
V
REF+
Positive reference voltage 2.4 - 3.6 V
V
REF+
must be always equal to or
less than V
DDA
R
O
(1)
Impedance output with buffer
OFF
-- 15 k
When the buffer is OFF, the Minimum
resistive load between DAC_OUT
and V
SS
to have a 1% accuracy is
1.5 M
C
LOAD
(1)
Capacitive load - - 50 pF
Maximum capacitive load at
DAC_OUT pin (when the buffer is
ON).
DAC_OUT
min
(1)
Lower DAC_OUT voltage
with buffer ON
0.2 - - V
It gives the maximum output
excursion of the DAC.
It corresponds to 12-bit input code
(0x0E0) to (0xF1C) at V
REF+
= 3.6 V
and (0x155) and (0xEAB) at V
REF+
=
2.4 V
DAC_OUT
max
(1)
Higher DAC_OUT voltage
with buffer ON
--V
DDA
– 0.2 V
DAC_OUT
min
(1)
Lower DAC_OUT voltage
with buffer OFF
-0.5 - mV
It gives the maximum output
excursion of the DAC.
DAC_OUT
max
(1)
Higher DAC_OUT voltage
with buffer OFF
--V
REF+
– 1LSB V