Datasheet

Revision history STM32F21xxx
168/175 DocID17050 Rev 9
20-Dec-2011 6
Updated SDIO register addresses in Figure 14: Memory map.
Updated Figure 3: Compatible board design between STM32F10xx
and STM32F2xx for LQFP144 package, Figure 2: Compatible board
design between STM32F10xx and STM32F2xx for LQFP100 package,
Figure 1: Compatible board design between STM32F10xx and
STM32F2xx for LQFP64 package, and added Figure 4: Compatible
board design between STM32F10xx and STM32F2xx for LQFP176
package.
Updated Section 3.3: Memory protection unit.
Updated Section 3.6: Embedded SRAM.
Updated Section 3.28: Universal serial bus on-the-go full-speed
(OTG_FS) to remove external FS OTG PHY support.
In Table 7: STM32F21x pin and ball definitions: changed SPI2_MCK
and SPI3_MCK to I2S2_MCK and I2S3_MCK, respectively. Added
ETH _RMII_TX_EN alternate function to PG11. Added EVENTOUT in
the list of alternate functions for I/O pin/balls. Removed
OTG_FS_SDA, OTG_FS_SCL and OTG_FS_INTN alternate
functions.
In Table 9: Alternate function mapping: changed I2S3_SCK to
I2S3_MCK for PC7/AF6, added FSMC_NCE3 for PG9, FSMC_NE3 for
PG10, and FSMC_NCE2 for PD7. Removed OTG_FS_SDA,
OTG_FS_SCL and OTG_FS_INTN alternate functions. Updated
peripherals corresponding to AF12.
Removed CEXT and ESR from Table 13: General operating
conditions.
Added maximum power consumption at T
A
=25 °C in Table 22: Typical
and maximum current consumptions in Stop mode.
Added CRYPTO, RNG, and HASH consumption in Table 25:
Peripheral current consumption.
Updated md minimum value in Table 35: SSCG parameters constraint.
Added examples in Section 6.3.11: PLL spread spectrum clock
generation (SSCG) characteristics.
Updated Table 53: SPI characteristics and Table 54: I
2
S
characteristics.
Updated Figure 45: ULPI timing diagram and Table 60: ULPI timing.
Updated Table 62: Dynamics characteristics: Ethernet MAC signals for
SMI, Table 63: Dynamics characteristics: Ethernet MAC signals for
RMII, and Table 64: Dynamics characteristics: Ethernet MAC signals
for MII.
Updated maximum f
S
values in Table 65: ADC characteristics.
Section 6.3.25: FSMC characteristics: updated Table 71 toTabl e 82 ,
changed C
L
value to 30 pF, and modified FSMC configuration for
asynchronous timings and waveforms. Updated Figure 59:
Synchronous multiplexed PSRAM write timings.
UpdatedTable 83: DCMI characteristics.
Updated Table 90: UFBGA176+25 - ultra thin fine pitch ball grid array
10 × 10 × 0.6 mm mechanical data.
Table 93. Document revision history (continued)
Date Revision Changes