Datasheet

DocID17050 Rev 9 163/175
STM32F21xxx Revision history
174
25-Nov-2010 3
Added WLCSP66 (64+2) package. Added note 1 related to LQFP176
on cover page.
Update I/Os in Section : Features.
Updated Table 5: Multi-AHB matrix.
Added case of BOR inactivation using IRROFF on WLCSP devices in
Section 3.15: Power supply supervisor.
Reworked Section 3.16: Voltage regulator to clarify regulator off
modes. Added Section 3.19: V
BAT
operation.
Modified V
DD_3
pin in Table 7: STM32F21x pin and ball definitions, and
added note related to the FSMC_NL pin.
Renamed BYPASS-REG REGOFF, and add IRROFF pin.
Changed V
SS_SA
to V
SS
, and V
DD_SA
pin reserved for future use.
Updated maximum HSE crystal frequency to 26 MHz.
USART4/5 renamed UART4/5. USART4 pins renamed UART4 in
Table 7: STM32F21x pin and ball definitions. Updated LIN and IrDA
features for UART4/5 in Table 5: USART feature comparison.
Section 6.2: Absolute maximum ratings: Updated V
IN
minimum and
maximum values and note for non-five-volt tolerant pins in Table 10:
Voltage characteristics. Updated I
INJ(PIN)
maximum values and related
notes in Table 11: Current characteristics.
Updated V
DDA
minimum value in Table 13: General operating
conditions.
Added Note 2 and updated Maximum CPU frequency in Table 14:
Limitations depending on the operating power supply range; and
added Figure 19: Number of wait states versus f
CPU
and V
DD
range.
Renamed Brownout Low, medium and High reset thresholds,
Renamed V
BORL
/V
BORM
/V
BORH
, V
BOR1
/V
BOR2
/V
BOR3
in Table 18:
Embedded reset and power control block characteristics.
Changed f
LSI
typical value in Table 32: LSI oscillator characteristics.
Added Figure 33: ACC
LSI
versus temperature.
Changed f
OSC_IN
maximum value in Table 29: HSE 4-26 MHz
oscillator characteristics.
Changed f
PLL_IN
maximum value in Table 33: Main PLL
characteristics, and updated jitter parameters in Table 34: PLLI2S
(audio PLL) characteristics.
Section 6.3.16: I/O port characteristics: updated V
IH
and V
IL
in
Table 45: I/O static characteristics.
Added Note 1 below Table 46: Output voltage characteristics.
Updated R
PD
and R
PU
parameter description in Table 56: USB OTG
FS DC electrical characteristics.
Updated V
REF+
minimum value in Table 65: ADC characteristics.
Updated Table 70: Embedded internal reference voltage.
Removed Ethernet and USB2 for 64-pin devices in Table 93 : Main
applications versus package for STM32F2xxx microcontrollers.
Added A.2: USB OTG full speed (FS) interface solutions, removed
“OTG FS connection with external PHY” figure, updated Figure 85,
Figure 86, and Figure 87 to add STULPI01B.
Table 93. Document revision history (continued)
Date Revision Changes