Datasheet

Revision history STM32F20xxx
176/178 DocID15818 Rev 11
04-Nov-2013 11
In the whole document, updated notes related to WLCSP64+2 usage
with IRROFF set to V
DD
. Updated Section 3.14: Power supply
schemes, Section 3.15: Power supply supervisor, Section 3.16.1:
Regulator ON and Section 3.16.2: Regulator OFF. Added
Section 3.16.3: Regulator ON/OFF and internal reset ON/OFF
availability. Added note related to WLCSP64+2 package.
Restructured RTC features and added reference clock detection in
Section 3.17: Real-time clock (RTC), backup SRAM and backup
registers.
Added note indicating the package view below Figure 10: STM32F20x
LQFP64 pinout, Figure 12: STM32F20x LQFP100 pinout, Figure 13:
STM32F20x LQFP144 pinout, and Figure 14: STM32F20x LQFP176
pinout.
Added Table 7: Legend/abbreviations used in the pinout table. Tabl e 8:
STM32F20x pin and ball definitions: content reformatted; removed
indeces on V
SS
and V
DD
; updated PA4, PA5, PA6, PC4, BOOT0;
replaced DCMI_12 by DCMI_D12, TIM8_CHIN by TIM8_CH1N,
ETH_MII_RX_D0 by ETH_MII_RXD0, ETH_MII_RX_D1 by
ETH_MII_RXD1, ETH_RMII_RX_D0 by ETH_RMII_RXD0,
ETH_RMII_RX_D1 by ETH_RMII_RXD1, and RMII_CRS_DV by
ETH_RMII_CRS_DV.
Table 10: Alternate function mapping: replaced FSMC_BLN1 by
FSMC_NBL1, added EVENTOUT as AF15 alternated fucntion for
PC13, PC14, PC15, PH0, PH1, and PI8.
Updated Figure 17: Pin loading conditions and Figure 18: Pin input
voltage.
Added V
IN
in Table 14: General operating conditions.
Removed note applying to V
POR/PDR
minimum value in Tabl e 19:
Embedded reset and power control block characteristics.
Updated notes related to C
L1
and C
L2
in Section : Low-speed external
clock generated from a crystal/ceramic resonator.
Updated conditions in Table 41: EMS characteristics. Updated
Table 42: EMI characteristics. Updated V
IL
, V
IH
and V
Hys
in Table 46:
I/O static characteristics. Added Figure : Output driving current and
updated Figure 38: I/O AC characteristics definition.
Updated V
IL(NRST)
and V
IH(NRST)
in Table 49: NRST pin
characteristics, updated Figure 38: I/O AC characteristics definition.
Removed tests conditions in Section : I2C interface characteristics.
Updated Table 52: I2C characteristics and Figure 40: I2C bus AC
waveforms and measurement circuit.
Updated I
VREF+
and I
VDDA
in Table 66: ADC characteristics. Updated
Offset comments in Table 68: DAC characteristics.
Updated minimum t
h(CLKH-DV)
value in Table 78: Synchronous non-
multiplexed NOR/PSRAM read timings.
Table 95. Document revision history (continued)
Date Revision Changes