Datasheet

Electrical characteristics STM32F20xxx
108/178 DocID15818 Rev 11
6.3.19 Communications interfaces
I
2
C interface characteristics
STM32F205xx and STM32F207xx
I
2
C interface meets the requirements of the standard I
2
C
communication protocol with the following restrictions: the I/O pins SDA and SCL are
mapped to are not “true” open-drain. When configured as open-drain, the PMOS connected
between the I/O pin and V
DD
is disabled, but is still present.
The I
2
C characteristics are described in Table 52. Refer also to Section 6.3.16: I/O port
characteristics
for more details on the input/output alternate function characteristics (SDA
and SCL)
.
Table 51. Characteristics of TIMx connected to the APB2 domain
(1)
1. TIMx is used as a general term to refer to the TIM1, TIM8, TIM9, TIM10, and TIM11 timers.
Symbol Parameter Conditions Min Max Unit
t
res(TIM)
Timer resolution time
AHB/APB2
prescaler distinct
from 1, f
TIMxCLK
=
120 MHz
1-
t
TIMxCLK
8.3 - ns
AHB/APB2
prescaler = 1,
f
TIMxCLK
= 60 MHz
1-
t
TIMxCLK
16.7 - ns
f
EXT
Timer external clock
frequency on CH1 to CH4
f
TIMxCLK
= 120 MHz
APB2 = 60 MHz
0
f
TIMxCLK
/2
MHz
060MHz
Res
TIM
Timer resolution - 16 bit
t
COUNTER
16-bit counter clock period
when internal clock is
selected
1 65536
t
TIMxCLK
0.0083 546 µs
t
MAX_COUNT
Maximum possible count
- 65536 × 65536
t
TIMxCLK
- 35.79 s