Datasheet

Electrical characteristics STM32F103xF, STM32F103xG
68/120 Doc ID 16554 Rev 3
Table 36. Synchronous multiplexed NOR/PSRAM read timings
(1)
1. C
L
= 15 pF.
Symbol Parameter Min Max Unit
t
w(CLK)
FSMC_CLK period 27.6 - ns
t
d(CLKL-NExL)
FSMC_CLK low to FSMC_NEx low (x = 0...2) - 0.5 ns
t
d(CLKL-NExH)
FSMC_CLK low to FSMC_NEx high (x = 0...2) 1 - ns
t
d(CLKL-NADVL)
FSMC_CLK low to FSMC_NADV low - 1 ns
t
d(CLKL-NADVH)
FSMC_CLK low to FSMC_NADV high 0.5 - ns
t
d(CLKL-AV)
FSMC_CLK low to FSMC_Ax valid (x = 0...25) - 0 ns
t
d(CLKL-AIV)
FSMC_CLK low to FSMC_Ax invalid (x = 16...25) 1.5 - ns
t
d(CLKL-NOEL)
FSMC_CLK low to FSMC_NOE low - 14 ns
t
d(CLKL-NOEH)
FSMC_CLK low to FSMC_NOE high 1 - ns
t
d(CLKL-ADV)
FSMC_CLK low to FSMC_AD[15:0] valid - 11 ns
t
d(CLKL-ADIV)
FSMC_CLK low to FSMC_AD[15:0] invalid 0.5 - ns
t
su(ADV-CLKH)
FSMC_A/D[15:0] valid data before FSMC_CLK
high
2- ns
t
h(CLKH-ADV)
FSMC_A/D[15:0] valid data after FSMC_CLK high 0 - ns