Datasheet

Pinouts and pin description STM32F103x8, STM32F103xB
28/105 DocID13587 Rev 16
Table 5. Medium-density STM32F103xx pin definitions
Pins
Pin name
Type
(1)
I / O Level
(2)
Main
function
(3)
(after reset)
Alternate functions
(4)
LFBGA100
UFBG100
LQFP48/UFQFPN48
TFBGA64
LQFP64
LQFP100
VFQFPN36
Default Remap
A3 B2 - - - 1 - PE2 I/O FT PE2 TRACECK
B3 A1 - - - 2 - PE3 I/O FT PE3 TRACED0
C3 B1 - - - 3 - PE4 I/O FT PE4 TRACED1
D3 C2 - - - 4 - PE5 I/O FT PE5 TRACED2
E3 D2 - - - 5 - PE6 I/O FT PE6 TRACED3
B2 E2 1 B2 1 6 - V
BAT
SV
BAT
A2 C1 2 A2 2 7 -
PC13-TAMPER-
RTC
(5)
I/O PC13
(6)
TAMPER-RTC
A1 D1 3 A1 3 8 - PC14-OSC32_IN
(5)
I/O PC14
(6)
OSC32_IN
B1 E1 4 B1 4 9 -
PC15-
OSC32_OUT
(5)
I/O PC15
(6)
OSC32_OUT
C2 F2 - - - 10 - V
SS_5
SV
SS_5
D2 G2 - - - 11 - V
DD_5
SV
DD_5
C1 F1 5 C1 5 12 2 OSC_IN I OSC_IN PD0
(7)
D1 G1 6 D1 6 13 3 OSC_OUT O OSC_OUT PD1
(7)
E1 H2 7 E1 7 14 4 NRST I/O NRST
F1 H1 - E3 8 15 - PC0 I/O PC0 ADC12_IN10
F2 J2 - E2 9 16 - PC1 I/O PC1 ADC12_IN11
E2 J3 - F2 10 17 - PC2 I/O PC2 ADC12_IN12
F3 K2 - -
(8)
11 18 - PC3 I/O PC3 ADC12_IN13
G1 J1 8 F1 12 19 5 V
SSA
SV
SSA
H1 K1 - - - 20 - V
REF-
SV
REF-
J1 L1 - G1
(8)
-21- V
REF+
SV
REF+
K1 M1 9 H1 13 22 6 V
DDA
SV
DDA