Datasheet

STM32F103xF, STM32F103xG Electrical characteristics
Doc ID 16554 Rev 3 65/120
Figure 24. Asynchronous multiplexed PSRAM/NOR read waveforms
Table 34. Asynchronous multiplexed PSRAM/NOR read timings
(1)
1. C
L
= 15 pF.
Symbol Parameter Min Max Unit
t
w(NE)
FSMC_NE low time 7t
HCLK
+ 0.5 7t
HCLK
+ 2 ns
t
v(NOE_NE)
FSMC_NEx low to FSMC_NOE low 3t
HCLK
+ 0.5 3t
HCLK
+ 1.5 ns
t
w(NOE)
FSMC_NOE low time 4t
HCLK
– 1 4t
HCLK
+ 1 ns
t
h(NE_NOE)
FSMC_NOE high to FSMC_NE high hold time 0.5 - ns
t
v(A_NE)
FSMC_NEx low to FSMC_A valid - 0 ns
t
v(NADV_NE)
FSMC_NEx low to FSMC_NADV low 0 1 ns
t
w(NADV)
FSMC_NADV low time t
HCLK
+ 0.5 t
HCLK
+ 2 ns
t
h(AD_NADV)
FSMC_AD (address) valid hold time after
FSMC_NADV high
t
HCLK
- ns
t
h(A_NOE)
Address hold time after FSMC_NOE high t
HCLK
-2 - ns
t
h(BL_NOE)
FSMC_BL hold time after FSMC_NOE high 0.5 - ns
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid - 0 ns
t
su(Data_NE)
Data to FSMC_NEx high setup time 4t
HCLK
- 0.5 - ns
t
su(Data_NOE)
Data to FSMC_NOE high setup time 4t
HCLK
- 1 - ns
t
h(Data_NE)
Data hold time after FSMC_NEx high 0 - ns
t
h(Data_NOE)
Data hold time after FSMC_NOE high 0 - ns
NBL
Data
FSMC_NBL[1:0]
FSMC_
AD[15:0]
t
v(BL_NE)
t
h(Data_NE)
Address
FSMC_A[25:16]
t
v(A_NE)
FSMC_NWE
t
v(A_NE)
ai14892b
Address
FSMC_NADV
t
v(NADV_NE)
t
w(NADV)
t
su(Data_NE)
t
h(AD_NADV)
FSMC_NE
FSMC_NOE
t
w(NE)
t
w(NOE)
t
v(NOE_NE)
t
h(NE_NOE)
t
h(A_NOE)
t
h(BL_NOE)
t
su(Data_NOE)
t
h(Data_NOE)