Datasheet

Electrical characteristics STM32F103xC, STM32F103xD, STM32F103xE
82/130 Doc ID 14611 Rev 8
Figure 41. NAND controller waveforms for common memory write access
Table 40. Switching characteristics for NAND Flash read and write cycles
(1)
1. C
L
= 15 pF.
Symbol Parameter Min Max Unit
t
d(D-NWE)
(2)
2. Based on characterization, not tested in production.
FSMC_D[15:0] valid before FSMC_NWE high 5t
HCLK
+ 12 ns
t
w(NOE)
(2)
FSMC_NOE low width 4t
HCLK
– 1.5 4t
HCLK
+ 1.5 ns
t
su(D-NOE)
(2)
FSMC_D[15:0] valid data before FSMC_NOE
high
25 ns
t
h(NOE-D)
(2)
FSMC_D[15:0] valid data after FSMC_NOE high 7 ns
t
w(NWE)
(2)
FSMC_NWE low width 4t
HCLK
– 1 4t
HCLK
+ 2.5 ns
t
v(NWE-D)
(2)
FSMC_NWE low to FSMC_D[15:0] valid 0 ns
t
h(NWE-D)
(2)
FSMC_NWE high to FSMC_D[15:0] invalid 2t
HCLK
+ 4ns ns
t
d(ALE-NWE)
(3)
3. Guaranteed by design, not tested in production.
FSMC_ALE valid before FSMC_NWE low 3t
HCLK
+ 1.5 ns
t
h(NWE-ALE)
(3)
FSMC_NWE high to FSMC_ALE invalid 3t
HCLK
+ 4.5 ns
t
d(ALE-NOE)
(3)
FSMC_ALE valid before FSMC_NOE low 3t
HCLK
+ 2 ns
t
h(NOE-ALE)
(3)
FSMC_NWE high to FSMC_ALE invalid 3t
HCLK
+ 4.5 ns
t
w(NWE)
t
h(NWE-D)
t
v(NWE-D)
ai14913b
FSMC_NWE
FSMC_N
OE
FSMC_D[15:0]
t
d(D-NWE)
ALE (FSMC_A17)
CLE (FSMC_A16)
FSMC_NCEx
Low
t
d(ALE-NWE)
t
h(NWE-ALE)