Datasheet

STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics
Doc ID 14611 Rev 8 65/130
Figure 25. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
t
v(NADV_NE)
FSMC_NEx low to FSMC_NADV low 5 ns
t
w(NADV)
FSMC_NADV low time t
HCLK
+ 1.5 ns
1. C
L
= 15 pF.
2. Based on characterisation, not tested in production.
Table 32. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
(1)(2)
Symbol Parameter Min Max Unit
t
w(NE)
FSMC_NE low time 3t
HCLK
– 1 3t
HCLK
+ 2 ns
t
v(NWE_NE)
FSMC_NEx low to FSMC_NWE low t
HCLK
– 0.5 t
HCLK
+ 1.5 ns
t
w(NWE)
FSMC_NWE low time t
HCLK
– 0.5 t
HCLK
+ 1.5 ns
t
h(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time t
HCLK
ns
t
v(A_NE)
FSMC_NEx low to FSMC_A valid 7.5 ns
t
h(A_NWE)
Address hold time after FSMC_NWE high t
HCLK
ns
t
v(BL_NE)
FSMC_NEx low to FSMC_BL valid 1.5 ns
t
h(BL_NWE)
FSMC_BL hold time after FSMC_NWE high t
HCLK
– 0.5 ns
t
v(Data_NE)
FSMC_NEx low to Data valid t
HCLK
+ 7 ns
t
h(Data_NWE)
Data hold time after FSMC_NWE high t
HCLK
ns
Table 31. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings
(1) (2)
Symbol Parameter Min Max Unit
NBL
Data
FSMC_NEx
FSMC_NBL[1:0]
FSMC_D[15:0]
t
v(BL_NE)
t
h(Data_NWE)
FSMC_NOE
Address
FSMC_A[25:0]
t
v(A_NE)
t
w(NWE)
FSMC_NWE
t
v(NWE_NE)
t
h(NE_NWE)
t
h(A_NWE)
t
h(BL_NWE)
t
v(Data_NE)
t
w(NE)
ai14990
FSMC_NADV
(1)
t
v(NADV_NE)
t
w(NADV)