Datasheet

STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics
Doc ID 14611 Rev 8 55/130
5.3.6 External clock source characteristics
High-speed external user clock generated from an external source
The characteristics given in Tabl e 2 1 result from tests performed using an high-speed
external clock source, and under ambient temperature and supply voltage conditions
summarized in Table 1 0 .
APB2
GPIOA 0.55
mA
GPIOB 0.72
GPIOC 0.72
GPIOD 0.55
GPIOE 1
GPIOF 0.72
GPIOG 1
ADC1
(2)
1.9
ADC2 1.7
TIM1 1.8
SPI1 0.4
TIM8 1.7
USART1 0.9
ADC3 1.7
1. f
HCLK
= 72 MHz, f
APB1
= f
HCLK
/2, f
APB2
= f
HCLK
, default prescaler value for each peripheral.
2. Specific conditions for ADC: f
HCLK
= 56 MHz, f
APB1
= f
HCLK
/2, f
APB2
= f
HCLK
, f
ADCCLK
= f
APB2/4
, ADON bit
in the ADC_CR2 register is set to 1.
Table 20. Peripheral current consumption
(1)
(continued)
Peripheral Typical consumption at 25 °C
Unit
Table 21. High-speed external user clock characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
HSE_ext
User external clock source
frequency
(1)
1. Guaranteed by design, not tested in production.
1825MHz
V
HSEH
OSC_IN input pin high level voltage 0.7V
DD
V
DD
V
V
HSEL
OSC_IN input pin low level voltage V
SS
0.3V
DD
t
w(HSE)
t
w(HSE)
OSC_IN high or low time
(1)
5
ns
t
r(HSE)
t
f(HSE)
OSC_IN rise or fall time
(1)
20
C
in(HSE)
OSC_IN input capacitance
(1)
5pF
DuCy
(HSE)
Duty cycle 45 55 %
I
L
OSC_IN Input leakage current V
SS
≤ V
IN
≤ V
DD
±1 µA