Datasheet

STM32F103x4, STM32F103x6 Revision history
Doc ID 15060 Rev 6 87/90
8 Revision history
Table 58. Document revision history
Date Revision Changes
22-Sep-2008 1 Initial release.
30-Mar-2009 2
“96-bit unique ID” feature added and I/O information clarified on page 1.
Timers specified on page 1 (Motor control capability mentioned).
Table 4: Timer feature comparison added.
PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default column
to Remap column, plus small additional changes in Table 5: Low-density
STM32F103xx pin definitions.
Figure 8: Memory map modified.
References to V
REF-
removed:
– Figure 1: STM32F103xx performance line block diagram modified,
– Figure 11: Power supply scheme modified
– Figure 34: ADC accuracy characteristics modified
– Note modified in Table 49: ADC accuracy.
Table 20: High-speed external user clock characteristics and Ta bl e 2 1:
Low-speed external user clock characteristics modified.
Note modified in Table 13: Maximum current consumption in Run mode,
code with data processing running from Flash and Table 15: Maximum
current consumption in Sleep mode, code running from Flash or RAM.
Figure 17 shows a typical curve (title modified). ACC
HSI
max values
modified in Table 24: HSI oscillator characteristics.
TFBGA64 package added (see Tabl e 5 4 and Ta ble 44 ).
Small text changes.