Datasheet

Revision history STM32F103x8, STM32F103xB
100/105 DocID13587 Rev 16
14-Mar-2008 5
Figure 2: Clock tree on page 12 added.
Maximum T
J
value given in Table 8: Thermal characteristics on page 38.
CRC feature added (see CRC (cyclic redundancy check) calculation unit
on page 9 and Figure 11: Memory map on page 34 for address).
I
DD
modified in Table 16: Typical and maximum current consumptions in
Stop and Standby modes.
ACC
HSI
modified in Table 24: HSI oscillator characteristics on page 55,
note 2 removed.
P
D
, T
A
and T
J
added, t
prog
values modified and t
prog
description clarified
in Table 28: Flash memory characteristics on page 57.
t
RET
modified in Table 29: Flash memory endurance and data retention.
V
NF(NRST)
unit corrected in Table 38: NRST pin characteristics on
page 68.
Table 42: SPI characteristics on page 72 modified.
I
VREF
added to Table 46: ADC characteristics on page 76.
Table 48: ADC accuracy - limited test conditions added. Table 49: ADC
accuracy modified.
LQFP100 package specifications updated (see Section 6: Package
characteristics on page 81).
Recommended LQFP100, LQFP 64, LQFP48 and VFQFPN36 footprints
added (see Figure 48, Figure 51, Figure 55 and Figure 42).
Section 6.2: Thermal characteristics on page 93 modified, Section 6.2.1
and Section 6.2.2 added.
Appendix A: Important notes on page 81 removed.
21-Mar-2008 6
Small text changes. Figure 11: Memory map clarified.
In Table 29: Flash memory endurance and data retention:
–N
END
tested over the whole temperature range
– cycling conditions specified for t
RET
–t
RET
min modified at T
A
= 55 °C
V
25
, Avg_Slope and T
L
modified in Table 50: TS characteristics.
CRC feature removed.
22-May-2008 7
CRC feature added back. Small text changes. Section 1: Introduction
modified. Section 2.2: Full compatibility throughout the family added.
I
DD
at T
A
max = 105 °C added to Table 16: Typical and maximum current
consumptions in Stop and Standby modes on page 45.
I
DD_VBAT
removed from Table 21: Typical current consumption in
Standby mode on page 47.
Values added to Table 41: SCL frequency (fPCLK1= 36 MHz.,VDD_I2C
= 3.3 V) on page 71.
Figure 33: SPI timing diagram - slave mode and CPHA = 0 on page 73
modified. Equation 1 corrected.
t
RET
at T
A
= 105 °C modified in Table 29: Flash memory endurance and
data retention on page 58.
V
USB
added to Table 44: USB DC electrical characteristics on page 75.
Figure 56: LQFP100 PD max vs. TA on page 95 modified.
Axx option added to Table 60: Ordering information scheme on page 96.
Table 61. Document revision history (continued)
Date Revision Changes