Datasheet

Revision history STM32F103x8, STM32F103xB
102/105 DocID13587 Rev 16
23-Apr-2009 10
I/O information clarified on page 1.
Figure 3: STM32F103xx performance line LFBGA100 ballout modified.
Figure 11: Memory map modified. Table 4: Timer feature comparison
added.
PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default column
to Remap column in Table 5: Medium-density STM32F103xx pin
definitions.
P
D
for LFBGA100 corrected in Table 9: General operating conditions.
Note modified in Table 13: Maximum current consumption in Run mode,
code with data processing running from Flash and Table 15: Maximum
current consumption in Sleep mode, code running from Flash or RAM.
Table 20: High-speed external user clock characteristics and Table 21:
Low-speed external user clock characteristics modified.
Figure 20 shows a typical curve (title modified). ACC
HSI
max values
modified in Table 24: HSI oscillator characteristics.
TFBGA64 package added (see Table 57 and Table 52). Small text
changes.
22-Sep-2009 11
Note 5 updated and Note 4 added in Table 5: Medium-density
STM32F103xx pin definitions.
V
RERINT
and T
Coeff
added to Table 12: Embedded internal reference
voltage. I
DD_VBAT
value added to Table 16: Typical and maximum
current consumptions in Stop and Standby modes. Figure 18: Typical
current consumption on VBAT with RTC on versus temperature at
different VBAT values added.
f
HSE_ext
min modified in Table 20: High-speed external user clock
characteristics.
C
L1
and C
L2
replaced by C in Table 22: HSE 4-16 MHz oscillator
characteristics and Table 23: LSE oscillator characteristics (fLSE =
32.768 kHz), notes modified and moved below the tables. Table 24: HSI
oscillator characteristics modified. Conditions removed from Table 26:
Low-power mode wakeup timings.
Note 1 modified below Figure 24: Typical application with an 8 MHz
crystal.
IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to
IEC 61967-2 in Section 5.3.10: EMC characteristics on page 58.
Jitter added to Table 27: PLL characteristics.
Table 42: SPI characteristics modified.
C
ADC
and R
AIN
parameters modified in Table 46: ADC characteristics.
R
AIN
max values modified in Table 47: RAIN max for fADC = 14 MHz.
Figure 45: LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array
package outline updated.
03-Jun-2010 12
Added STM32F103TB devices.
Added VFQFPN48 package.
Updated note 2 below Table 40: I2C characteristics
Updated Figure 32: I2C bus AC waveforms and measurement circuit
Updated Figure 31: Recommended NRST pin protection
Updated Section 5.3.12: I/O current injection characteristics
Table 61. Document revision history (continued)
Date Revision Changes