Datasheet

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STM32F102x8, STM32F102xB Electrical characteristics
79
5.3.15 TIM timer characteristics
The parameters given in Table 40 are guaranteed by design.
Refer to Section 5.3.13: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
5.3.16 Communications interfaces
I
2
C interface characteristics
The STM32F102xx medium-density USB access line I
2
C interface meets the requirements
of the standard I
2
C communication protocol with the following restrictions: t
he I/O pins SDA
and SCL are mapped to are not “true” open-drain. When configured as open-drain, the
PMOS connected between the I/O pin and V
DD
is disabled, but is still present.
The I
2
C characteristics are described in Table 41. Refer also to
Section 5.3.13: I/O port
characteristics
for more details on the input/output alternate function characteristics (SDA
and SCL)
.
Table 38. TIMx
(1)
characteristics
1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers.
Symbol Parameter Conditions Min Max Unit
t
res(TIM)
Timer resolution time
1t
TIMxCLK
f
TIMxCLK
= 48 MHz 20.84 ns
f
EXT
Timer external clock
frequency on CH1 to CH4
0f
TIMxCLK
/2 MHz
f
TIMxCLK
= 48 MHz 0 24 MHz
Res
TIM
Timer resolution 16 bit
t
COUNTER
16-bit counter clock period
when internal clock is
selected
1 65536 t
TIMxCLK
f
TIMxCLK
= 48 MHz 0.0208 1365 µs
t
MAX_COUNT
Maximum possible count
65536 × 65536 t
TIMxCLK
f
TIMxCLK
= 48 MHz 89.48 s