Datasheet

Electrical characteristics STM32F102x8, STM32F102xB
40/80 DocID15056 Rev 5
3. External clock is 8 MHz and PLL is on when f
HCLK
> 8 MHz.
Table 17. Typical current consumption in Sleep mode, code running from Flash or
RAM
Symbol Parameter Conditions f
HCLK
Typ
(1)
1. Typical values are measures at T
A
= 25 °C, V
DD
= 3.3 V.
Typ
(1)
Unit
All peripherals
enabled
(2)
2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this
consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register).
All peripherals
disabled
IDD
Supply
current in
Sleep mode
External clock
(3)
3. External clock is 8 MHz and PLL is on when f
HCLK
> 8 MHz.
48 MHz 9.9 3.9
mA
36 MHz 7.6 3.1
24 MHz 5.3 2.3
16 MHz 3.8 1.8
8 MHz 2.1 1.2
4 MHz 1.6 1.1
2 MHz 1.3 1
1 MHz 1.11 0.98
500 kHz 1.04 0.96
125 kHz 0.98 0.95
Running on High
Speed Internal
RC (HSI), AHB
prescaler used to
reduce the
frequency
48 MHz 9.3 3.3
36 MHz 7 2.5
24 MHz 4.8 1.8
16 MHz 3.2 1.2
8 MHz 1.6 0.6
4 MHz 1 0.5
2 MHz 0.72 0.47
1 MHz 0.56 0.44
500 kHz 0.49 0.42
125 kHz 0.43 0.41