Datasheet

DocID15056 Rev 5 27/80
STM32F102x8, STM32F102xB Electrical characteristics
79
5.1.6 Power supply scheme
Figure 8. Power supply scheme
Caution: In Figure 8, the 4.7 µF capacitor must be connected to V
DD3
.
Figure 6. Pin loading conditions Figure 7. Pin input voltage
ai14972
C = 50 pF
STM32F102 pin
ai14973
STM32F102 pin
V
IN
ai14882c
V
DD
1/2/3/4
Analog:
RCs, PLL,
...
Power swi tch
V
BAT
GP I/O s
OUT
IN
Kernel logic
(CPU,
Digital
& Memories)
Backup circuitry
(OSC32K,RTC,
Backup registers)
Wake-up logic
3 × 100 nF
+ 1 × 4.7 µF
1.8-3.6 V
Regulator
V
SS
1/2/3/4
V
DDA
V
SSA
ADC
Level shifter
IO
Logic
V
DD
10 nF
+ 1 µF
V
DD
V
REF+
V
REF-