Datasheet

STM32F101xF, STM32F101xG Electrical characteristics
Doc ID 17143 Rev 2 63/108
Synchronous waveforms and timings
Figure 25 through Figure 28 represent synchronous waveforms and Tabl e 3 6 through
Tabl e 3 8 provide the corresponding timings. The results shown in these tables are obtained
with the following FSMC configuration:
● BurstAccessMode = FSMC_BurstAccessMode_Enable;
● MemoryType = FSMC_MemoryType_CRAM;
● WriteBurst = FSMC_WriteBurst_Enable;
● CLKDivision = 1; (0 is not supported, see the STM32F10xxx reference manual)
● DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
Figure 25. Synchronous multiplexed NOR/PSRAM read timings
FSMC_CLK
FSMC_NEx
FSMC_NADV
FSMC_A[25:16]
FSMC_NOE
FSMC_AD[15:0]
AD[15:0] D1 D2
FSMC_NWAIT
(WAITCFG = 1b, WAITPOL + 0b)
FSMC_NWAIT
(WAITCFG = 0b, WAITPOL + 0b)
t
w(CLK)
t
w(CLK)
Data latency = 1
BUSTURN = 0
t
d(CLKL-NExL)
t
d(CLKH-NExH)
t
d(CLKL-NADVL)
t
d(CLKL-AV)
t
d(CLKL-NADVH)
t
d(CLKH-AIV)
t
d(CLKL-NOEL)
t
d(CLKH-NOEH)
t
d(CLKL-ADV)
t
d(CLKL-ADIV)
t
su(ADV-CLKH)
t
h(CLKH-ADV)
t
su(ADV-CLKH)
t
h(CLKH-ADV)
t
su(NWAITV-CLKH)
t
h(CLKH-NWAITV)
t
su(NWAITV-CLKH)
t
h(CLKH-NWAITV)
t
su(NWAITV-CLKH)
t
h(CLKH-NWAITV)
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