Datasheet

DocID13586 Rev 16 83/90
STM32F101x8, STM32F101xB Revision history
89
8 Revision history
Table 54. Document revision history
Date Revision Changes
06-Jun-2007 1 First draft.
20-Jul-07 2
I
DD
values modified in Table 11: Maximum current consumption in Run
and Sleep modes (TA = 85 °C).
V
BAT
range modified in Power supply schemes.
V
REF+
min value, t
STAB
, t
lat
and f
TRIG
added to Table 42: ADC
characteristics. Table 38: TIMx characteristics modified.
Note 6 modified and Note 8, Note 5 and Note 7 added below Table 4:
Medium-density STM32F101xx pin definitions.
Figure 20: Low-speed external clock source AC timing diagram,
Figure 11: Power supply scheme, Figure 28: Recommended NRST pin
protection and Figure 29: I2C bus AC waveforms and measurement
circuit(1) modified.
Sample size modified and machine model removed in Electrostatic
discharge (ESD).
Number of parts modified and standard reference updated in Static latch-
up. 25 °C and 85 °C conditions removed and class name modified in
Table 32: Electrical sensitivities.
t
SU(LSE)
changed to t
SU(LSE)
in Table 21: HSE 4-16 MHz oscillator
characteristics.
In Table 28: Flash memory endurance and data retention, typical
endurance added, data retention for T
A
= 25 °C removed and data
retention for T
A
= 85 °C added. Note removed below Table 8: General
operating conditions.
V
BG
changed to V
REFINT
in Table 11: Embedded internal reference
voltage. I
DD
max values added to Table 11: Maximum current
consumption in Run and Sleep modes (TA = 85 °C).
I
DD(HSI)
max value added to Table 23: HSI oscillator characteristics.
R
PU
and R
PD
min and max values added to Table 34: I/O static
characteristics. R
PU
min and max values added to Table 37: NRST pin
characteristics (two notes removed).
Datasheet title corrected. USB characteristics section removed.
Features on page 1 list optimized. Small text changes.