Datasheet

DocID13586 Rev 16 31/90
STM32F101x8, STM32F101xB Electrical characteristics
89
5.1.6 Power supply scheme
Figure 11. Power supply scheme
Caution: In Figure 11, the 4.7 µF capacitor must be connected to V
DD3
.
Figure 9. Pin loading conditions Figure 10. Pin input voltage
ai14123b
C = 50 pF
STM32F10xxx pin
ai14124b
STM32F10xxx pin
V
IN
ai14125d
V
DD
1/2/3/4/5
Analog:
RCs, PLL,
...
Power swi tch
V
BAT
GP I/O s
OUT
IN
Kernel logic
(CPU,
Digital
& Memories)
Backup circuitry
(OSC32K,RTC,
Backup registers)
Wake-up logic
5 × 100 nF
+ 1 × 4.7 µF
1.8-3.6V
Regulator
V
SS
1/2/3/4/5
V
DDA
V
REF+
V
REF-
V
SSA
ADC
Level shifter
IO
Logic
V
DD
10 nF
+ 1 µF
V
REF
10 nF
+ 1 µF
V
DD