Datasheet

Electrical characteristics STM32F101xC, STM32F101xD, STM32F101xE
92/112 Doc ID 14610 Rev 8
Figure 48. SPI timing diagram - master mode
(1)
1. Measurement points are done at CMOS levels: 0.3V
DD
and 0.7V
DD
.
5.3.18 12-bit ADC characteristics
Unless otherwise specified, the parameters given in Ta ble 5 5 are derived from tests
performed under ambient temperature, f
PCLK2
frequency and V
DDA
supply voltage
conditions summarized in Ta bl e 1 0.
Note: It is recommended to perform a calibration after each power-up.
ai14136
SCK Input
CPHA= 0
MOSI
OUTUT
MISO
INP UT
CPHA= 0
MS BIN
M SB OUT
BI T6 IN
LSB OUT
LSB IN
CPOL=0
CPOL=1
B IT1 OUT
NSS input
t
c(SCK)
t
w(SCKH)
t
w(SCKL)
t
r(SCK)
t
f(SCK)
t
h(MI)
High
SCK Input
CPHA=1
CPHA=1
CPOL=0
CPOL=1
t
su(MI)
t
v(MO)
t
h(MO)